Tuesday, October 16, 2007
Mainstream goes 3D packaging, not towards EUV flatness
Unable to significantly break through a bottleneck in the technical development of the key photolithography in the 32-nanometer-and-below production process, semiconductor makers worldwide have been eager to seek new alternative solutions in packaging technologies, resulting in a delay of their upgrading the 32-nano and below process.
Recently, at the International Microsystems, Packaging, Assembly and Circuits Technology (IMPACT) Conference 2007, which took place in Taipei from Oct.1 to 3, quite a few attendees reached a consensus that 3D packaging technologies will become the mainstream solutions in the future.
Recently, at the International Microsystems, Packaging, Assembly and Circuits Technology (IMPACT) Conference 2007, which took place in Taipei from Oct.1 to 3, quite a few attendees reached a consensus that 3D packaging technologies will become the mainstream solutions in the future.
Processing Capacity of Stacking and Packaging Companies Unit: One million Chips | |||||
2004 | 2005 | 2006 | 2007 | 2008 | |
Stacking | 790 | 966 | 1,171 | 1,349 | 1,519 |
Packaging | 732 | 927 | 1,104 | 1,280 | 1,408 |
THIS LINK posted by Joseph Bell : 11:15 AM
