Thursday, May 31, 2007
11 years later : zero advance in productivity
Finally, a truth on current bad hardware.
But, much more impressive comparision would be on future bad hardware Intel's 8 cores Apple. However, without appropriate windows support, this is certainly the next winner in BAD HARDWARE category. But, proof "uber alles" on bad hardware unstoppable rise is the RESSURECTION OF PENTIUM FROM ITS GRAVE IN HOT HELL. That's all folks. The comment isn't needed.
Picture alone of the Intel's Pentium 666 - Double Crossed Hot Edition TM given below, is worth more than 1K words:
Briefly, from 1986 -2016, overall user productivity rise is supposed almost zero.
Nice hint that we actually still don't live in information society.
Because the next society organisation always inevitably requires higher productivity,
or there is no need for any change at all. No benefits, isn't it?
:/
AMD Barcelona benchmarks to be revealed in a week?
Has AMD deigned to confirm that they will be releasing real benchmarks (with clock speeds) next week?
Were supposedly a month away from the Barcelona launch?
If AMD doesn't release any credible benchmarks at Computex I will join the good captain in labeling K10 vapourware.
I agree. But, in the meantime, would you be satisfied with this PHENOM hi res pic below?
But do you need my advice?. Buy AMD's shares, now. It will be your best business move this year. After a week later your profits might be significantly lower. Cheers to good hardware !.
Were supposedly a month away from the Barcelona launch?
If AMD doesn't release any credible benchmarks at Computex I will join the good captain in labeling K10 vapourware.
I agree. But, in the meantime, would you be satisfied with this PHENOM hi res pic below?
But do you need my advice?. Buy AMD's shares, now. It will be your best business move this year. After a week later your profits might be significantly lower. Cheers to good hardware !.
Wednesday, May 30, 2007
Sex addict sues IBM for $5M
It isn't often that a man asks for sympathy because he is addicted to pornographic Web sites.When James Pacenza, 58, was caught using an online sex chat room at work, IBM fired him. But Pacenza, a Vietnam veteran suffering from post-traumatic stress disorder, claims IBM should have kept him on and given him sympathy instead of giving him a pink slip.
Bad hardware question is the following: What will happen in that sense with some few hundred thousands American soldiers in Iraq? If you are interested to test yourself on online sex addiction, please click here.
Tuesday, May 29, 2007
Missile defence shield doesn't work when rogue country doesn't cooperate !
I mean, the enemies only need to deliver theirs deadly missile trajectory parameters in advance to be 100% shut down. Kinda of cooperative enemies. Or better, friendly foes (nothing new for this administration).
It was a blow to President Bush's multibillion-dollar drive for a layered shield to thwart ballistic missiles from countries like North Korea and Iran that could be tipped with chemical, germ or nuclear warheads.
If the errant missile had flown right, it was to have been slammed into by an interceptor to have been fired from Vandenberg Air Force Base on California's central coast.
ENSOR: There is also the issue of radars. Even General Kadish says the national missile defense won't work well against all potential adversaries unless the U.S. gets some help.
MOSCOW'S RESPONSE: Russia on Tuesday test-launched a new intercontinental ballistic missile capable of carrying multiple independent warheads, and a top government official said it could penetrate any defense system, a news agency reported.
Bad hardware comment in the end: CHEERS to national security, but bad hardware is still on high elevation rise. Layered anti missile shield? More necessary in this moment, seems is the shield from lyars. :)
It was a blow to President Bush's multibillion-dollar drive for a layered shield to thwart ballistic missiles from countries like North Korea and Iran that could be tipped with chemical, germ or nuclear warheads.
If the errant missile had flown right, it was to have been slammed into by an interceptor to have been fired from Vandenberg Air Force Base on California's central coast.
ENSOR: There is also the issue of radars. Even General Kadish says the national missile defense won't work well against all potential adversaries unless the U.S. gets some help.
MOSCOW'S RESPONSE: Russia on Tuesday test-launched a new intercontinental ballistic missile capable of carrying multiple independent warheads, and a top government official said it could penetrate any defense system, a news agency reported.
Bad hardware comment in the end: CHEERS to national security, but bad hardware is still on high elevation rise. Layered anti missile shield? More necessary in this moment, seems is the shield from lyars. :)
Sunday, May 27, 2007
40K pages of Bad Hardware
40 000 page views of Bad Hardware.
What to say after all? Keep your eyes widely open.
There are so much things on bad hardware, floating around, more than ever.
We eagerly swallow them, easier than ever.
The cause behind is quite trivial: men became increasingly women (see below).
And no one is immune to bad hardware. :)
Friday, May 25, 2007
Latest on AMD Barcelona clock
Famous InTELquirer journo founds AMD Barcelona clock at 1,8 Ghz.Is it bad or good? First, it is supposedly demoed clock. That means at launch it might be substantially higher.
However, is there any need for it? Barcelona architecture is so superior o Intel Core Duo, that simply there is no
need for higher clock in the 4 core gladiators' arena. Of course, new AMD coure could run faster, but power consumption will rise too. Isn't it much better to drive job and dispatch it to the cores that consumes less power together than say 2-3 times higer clocked single core? But they will consume power even in the case when only one low power core would be sufficient. Wrong, new AMD architecture has split power planes. That means that not needed processor will be switched off. Completely. OK, we see thus power aware architecture below the Barca engine hub.
However, until then AMD will gradually rise its clok. Starting even form 1,8 Ghz. Actually, Bad hardware week found previosly that even 1,7Ghz Barcelona core might suffice to beat Intel. Amen.
We could have delay for Barcelona, but not for more than a month. Now, Barcelona benchmarks remain to be seen on Computex. At least. But not of course, last.
However, is there any need for it? Barcelona architecture is so superior o Intel Core Duo, that simply there is no
need for higher clock in the 4 core gladiators' arena. Of course, new AMD coure could run faster, but power consumption will rise too. Isn't it much better to drive job and dispatch it to the cores that consumes less power together than say 2-3 times higer clocked single core? But they will consume power even in the case when only one low power core would be sufficient. Wrong, new AMD architecture has split power planes. That means that not needed processor will be switched off. Completely. OK, we see thus power aware architecture below the Barca engine hub.
Old schedule is given below, note two months delay. Mass production starts only in August.
Channels will be filled up to September. Sounds resonable to me. CLOCK IS 2,1+ GHZ.
Perhaps those clock targets are actually behind the two month delay of Barcelona launch?.
Now, what will Intel do? Well, Intel quad core has bus connectivity that will run well under 32bit applications, but will suck under 64bit Vista, in comparision to the new AMD. And situation will remain unchanged until 2009. Point.Channels will be filled up to September. Sounds resonable to me. CLOCK IS 2,1+ GHZ.
Perhaps those clock targets are actually behind the two month delay of Barcelona launch?.
However, until then AMD will gradually rise its clok. Starting even form 1,8 Ghz. Actually, Bad hardware week found previosly that even 1,7Ghz Barcelona core might suffice to beat Intel. Amen.
We could have delay for Barcelona, but not for more than a month. Now, Barcelona benchmarks remain to be seen on Computex. At least. But not of course, last.
Wednesday, May 23, 2007
Looking for profits, AMD slows down
'The production in the future 'Fab38' -- which is what we call our recently expanded chip factory in Dresden -- will no longer start production at a steeper rate of pace -- which was what we have originally planned. One can say, we will proceed on a flat curve,' he added.
Does it mean no 45nm in 2008? Or simply delay of 65nm new cores? Or both. Or not perhaps so bad at all.
On the contrary, that could mean satisfying yield for existing technology that enables low price competitiveness.
Anyway, that could mean 45nm troubles for all, not for AMD only.
The worst case scenario is that AMD gives up from Chartered production started in June. That would be a slap.
But, wait 2-3 weeks to see what actually happens. In pratice, that could mean Chartered pipe is simply temporarily switched to the other customers:
Now Fab7 looks set to return to ramping, though the end of year figure given suggests that the ramp rate of 1,000wspm will not be as fast for AMD compared to the IBM/Microsoft ramp in the second half of 2005, which averaged about 1,450wspm.
Tuesday, May 22, 2007
We don't live in information society !
Surprisingly, after 2000 world's energy use efficiency has worsen !!!
By the way, do you remember that in 2001 famous Intel's P4 with unbeatable clock was launched.
Seems that AMD only now proved corretness of its
green, low power long term processing strategy.
Barcelona is twice faster inside the same thermal envelope !.
IBM follows, with Power6 now. The same power consumption on doubled clock.
Barcelona is twice faster inside the same thermal envelope !.
IBM follows, with Power6 now. The same power consumption on doubled clock.
Sunday, May 20, 2007
4,7Ghz IBM Power6 leaked
IBM system p6 570 server equipped with 8 - core SMP implemented Power6 processor chips each initially clocked at 4,7 GHz with L2 Cache of 4 MB and L3 Cache of 32Mb.
Each Power6 chip has two cores, and each core will have its own dedicated 2 MB L2 cache memory. With the Power4 chips, IBM had 1.44 MB of shared L2 cache for the two cores on the chip, and with the Power5 design, IBM increased the shared L2 cache to 1.9 MB. As with the Power5, each Power6 core can have a 32 MB L3 cache assigned to it. The Power6 chip also includes two memory controllers on chip as well as an L3 memory controller and an L3 directory cache. IBM is allowing one or two memory controllers to be turned on, as necessary in the system design, and they can be configured to run at full or half width, too. The Power6 chips will come with L3 cache in three different configurations--those without L3 cache, those with the L3 cache on the module (as was done with the Power4 and Power5 chips), and those that have the L3 cache off the module.
AIX 5L roadmap is based on Power architecture until 2014. However, I couldn't find similar OS support for Intel's Itanium. :)
Power6 solved leakage problems by 90-65nm optimized implementation.
But, the Power6 chip also includes a two-tiered memory coherency protocol that has significantly lower latencies compared to the Power5. That well explains architectural improvements behind the achieved 4,7Ghz clock rate.
Saturday, May 19, 2007
Airplanes fall, bad sequel
Lockerby, 1988.
The Boeing part that hit Lockerbie created a crater with a volume aprx. 560 kubic meters, about 47 meters (155 feet) broad and 196 feet long. The weight of material displaced by the wing structure was estimated to be well in excess of 1500 tonnes. 300 tonnes of Boeing weights removed 5 times more of ground materials.
Actually, this had hit Pentagon at 400 mph. 12 tonnes heavyweight, like B25.
Kinetic energy released is thus 12000 x 31605. Nice SLAM in the end of secret mission info brain, after that plane recon on two successful airplane crashes into twin towers, had been completed somewhat earlier. Its composite graphene body structure simply evaporized in the moment of impact, and that is why there is no slam remanants, as the pictures above undoubtely show. Beside, no impact holes of two Boeing engines , and engine remnant found is much smaller than Boeing's. What is the overall weight of removed materials? No one interested?
"I think it was the heroism of the passengers on board that brought it down, but the Air Force was in a position to do so if we had had to," he told PBS's "NewsHour With Jim Lehrer." C130 military plane was close to the place of accident.
At a news conference on Thursday morning, Crowley told reporters that FBI investigators had not ruled out the possibility (of a shootdown). But he later (the same day) retracted the statement, saying unequivocally `there was no military involvement in what happened here.'
http://www.techtv.com/news/story/0,24195,3347678,00.html
9/11, four crashes, and still no records announced from flight and voice recorders. Strange a bit?
However, when needed like in Lockerby case, 1500 tonnes of ground didn't destroy flight recorder, just enough to accuse and convince Lybian agent?
If Parliamentary system would be applied Bush would resign. Now.
By the way, elections 2008 will be the first one without incumbents since 1928. Well, 1928 - 2008, what a nice financial parallel. Nicely envisioned electorial program, but seems that something went wrong for incumbent Presidential dynamic duo.
Or, in simplified English: They screwed. Badly. That is why Intel establish its new fab to be ready for production in 2009, not in the USA, not in EU, not in the emerging China, but in ... relatively stable Israel. :)
Or, in memorable Engrish: "Somebody set up us the bomb" and "You have no chance to survive, make your time".
The Boeing part that hit Lockerbie created a crater with a volume aprx. 560 kubic meters, about 47 meters (155 feet) broad and 196 feet long. The weight of material displaced by the wing structure was estimated to be well in excess of 1500 tonnes. 300 tonnes of Boeing weights removed 5 times more of ground materials.
"Hole" in the ground and debris made after 9/11 "attack" on Pentagon
Actually, this had hit Pentagon at 400 mph. 12 tonnes heavyweight, like B25.
Kinetic energy released is thus 12000 x 31605. Nice SLAM in the end of secret mission info brain, after that plane recon on two successful airplane crashes into twin towers, had been completed somewhat earlier. Its composite graphene body structure simply evaporized in the moment of impact, and that is why there is no slam remanants, as the pictures above undoubtely show. Beside, no impact holes of two Boeing engines , and engine remnant found is much smaller than Boeing's. What is the overall weight of removed materials? No one interested?
Flight 93
Flight 93.On Friday, Deputy Defense Secretary Paul Wolfowitz said that the military had been monitoring the plane. But Wolfowitz echoed other officials aware of cellular phone calls made by passengers to the families, who -- told by relatives that other planes had crashed into the World Trade Center towers -- said they planned to take action against the terrorists. "I think it was the heroism of the passengers on board that brought it down, but the Air Force was in a position to do so if we had had to," he told PBS's "NewsHour With Jim Lehrer." C130 military plane was close to the place of accident.
At a news conference on Thursday morning, Crowley told reporters that FBI investigators had not ruled out the possibility (of a shootdown). But he later (the same day) retracted the statement, saying unequivocally `there was no military involvement in what happened here.'
http://www.techtv.com/news/story/0,24195,3347678,00.html
U.S. Army Air Corps plane crashed into Empire State Building
07/28/1945 9:49 LOCATION: New York, NY CARRIER: Military FLIGHT: AIRCRAFT: USAAC B-25 Bomber REGISTRY: 0577 S/N: ABOARD: 3 FATAL: 3 GROUND: 11 DETAILS: A U.S. Army Air Force plane crashed into the 79th floor of the Empire State Building in heavy fog. Lt. Col. William Franklin Smith Jr., the pilot, became disoriented while trying to land at Newark Airport. Lt. Smith was told he had a 3 hour wait to land at Newark. Impatient to get his plane on the ground, he falsely declared he had official business at La Guardia Airport with the intention of diverting to Newark as soon as he was cleared. The 12 ton plane smashed a 20 ft. hole in the building. Fuel from the ruptured gas tanks poured out and set two floors ablaze killing 10 people. One engine exited the south side of the building and plunged into a penthouse below.However, Empire State Building didn't collapse.
9/11, four crashes, and still no records announced from flight and voice recorders. Strange a bit?
However, when needed like in Lockerby case, 1500 tonnes of ground didn't destroy flight recorder, just enough to accuse and convince Lybian agent?
If Parliamentary system would be applied Bush would resign. Now.
By the way, elections 2008 will be the first one without incumbents since 1928. Well, 1928 - 2008, what a nice financial parallel. Nicely envisioned electorial program, but seems that something went wrong for incumbent Presidential dynamic duo.
Or, in simplified English: They screwed. Badly. That is why Intel establish its new fab to be ready for production in 2009, not in the USA, not in EU, not in the emerging China, but in ... relatively stable Israel. :)
Or, in memorable Engrish: "Somebody set up us the bomb" and "You have no chance to survive, make your time".
Even 2 core Opteron beats 4 core Xeon in latest benchmarks . In the name of humanity, please delay Barcelona.
This shows the AMD platform scales very well, distributing the workload over 8 sockets perfectly.
In a 16 core configuration. Xeon performance are simply miserable, as correctly predicted here.
What to say for 3Ghz Opteron 8222SE against Intel's ?
In the name of fair play, AMD please delay Barcelona.
On the contrary, in a year or so, this server will run 64 AMD cores in 45 nm.
"It all comes down to a choke point, and that choke point is system memory access."
In a 16 core configuration. Xeon performance are simply miserable, as correctly predicted here.
What to say for 3Ghz Opteron 8222SE against Intel's ?
In the name of fair play, AMD please delay Barcelona.
On the contrary, in a year or so, this server will run 64 AMD cores in 45 nm.
"It all comes down to a choke point, and that choke point is system memory access."
--Jon Peddie,
owner of research firm Jon Peddie Associates
owner of research firm Jon Peddie Associates
Friday, May 18, 2007
AMD Bulldozer - Griffin K10 mobile dual core
I will buy it. In a six months or so. With DX10 inside. Don't buy 32bit mobiles. Because of lack of Vista support in the near future. Celebrated AMD who brought 64 bit to the people.
Thursday, May 17, 2007
AMD's CTO: Intel is an old-school copycat company
Phil Hester, is senior vice president and chief technology officer (CTO) at AMD. He is responsible for setting the architectural and product strategies and plans for AMD’s microprocessor business. According to his biography posted on AMD’s website, he also chairs the AMD Technology Council, ensuring that product development, integration, and process organizations align technology capabilities with product direction.
Before joining AMD in September of 2005, Hester was co-founder and chief executive officer at Newisys and spent 23 years at IBM.
Phil Hester: More and more they figured out that Itanium is a ditch. Obviously, they copied our 64-bit extensions. A lot of the work we have done on virtualization they copied. A lot of the work we have done on power efficiency they copied. By doing Torrenza, we forced them to do what is their version of that idea. We don’t know a whole lot about [their version] yet, but, in general, they soon will be copying the idea of co-processors. So, every major platform innovation we came out within the last two years, in one form or the other, they copied.
Before joining AMD in September of 2005, Hester was co-founder and chief executive officer at Newisys and spent 23 years at IBM.
Phil Hester: More and more they figured out that Itanium is a ditch. Obviously, they copied our 64-bit extensions. A lot of the work we have done on virtualization they copied. A lot of the work we have done on power efficiency they copied. By doing Torrenza, we forced them to do what is their version of that idea. We don’t know a whole lot about [their version] yet, but, in general, they soon will be copying the idea of co-processors. So, every major platform innovation we came out within the last two years, in one form or the other, they copied.
Barcelona still too buggy ?
Lets wait for June 6th.
By the way, Intel's 134 Core 2 bugs didn't make any launch delay last year. And strike on confidence of Intel's server manufacturers. By the way, that is Intel's only own original tribute to X86-64 architecture. :)
Personally, I think Barcelona benchmarks will be launched on June 6th, though processor delivery will begin later in Jule/August.
By the way, Intel's 134 Core 2 bugs didn't make any launch delay last year. And strike on confidence of Intel's server manufacturers. By the way, that is Intel's only own original tribute to X86-64 architecture. :)
Personally, I think Barcelona benchmarks will be launched on June 6th, though processor delivery will begin later in Jule/August.
What after the worst president in history ?
But first we must resolute, is he the worst President in history or twice the worst President in history?A poll published by Newsweek showed the President earning the support of just 28 per cent of voters, the lowest number he has ever scored in the weekly magazine's survey.
Now, though, George W. Bush is in serious contention for the title of worst ever. In early 2004, an informal survey of 415 historians conducted by the nonpartisan History News Network found that eighty-one percent considered the Bush administration a "failure."
Among those who called Bush a success, many gave the president high marks only for his ability to mobilize public support and get Congress to go along with what one historian called the administration's "pursuit of disastrous policies.
Is there any analysis on his administration effects on hardware. I mean BAD hardware. Look at Intel's designs and financial results. In pair with Bush presidency. Look at AMD recently. catastrophy. SGI? Bankrupt. IBM? 150 000 rumored lay offs. Sun? Financial collapse. HP? Do you remember spying there? Any company left?Sony? No, Sony is not an American company.
Does someone of you remember the same those hardware companies prosperity before Bush presidency?
LATEST: FORMER PRESIDENT CARTER SAYS EVEN HIS PRESIDENCY WAS MANY TIMES BETTER.
Now, though, George W. Bush is in serious contention for the title of worst ever. In early 2004, an informal survey of 415 historians conducted by the nonpartisan History News Network found that eighty-one percent considered the Bush administration a "failure."
Among those who called Bush a success, many gave the president high marks only for his ability to mobilize public support and get Congress to go along with what one historian called the administration's "pursuit of disastrous policies.
Is there any analysis on his administration effects on hardware. I mean BAD hardware. Look at Intel's designs and financial results. In pair with Bush presidency. Look at AMD recently. catastrophy. SGI? Bankrupt. IBM? 150 000 rumored lay offs. Sun? Financial collapse. HP? Do you remember spying there? Any company left?Sony? No, Sony is not an American company.
Does someone of you remember the same those hardware companies prosperity before Bush presidency?
LATEST: FORMER PRESIDENT CARTER SAYS EVEN HIS PRESIDENCY WAS MANY TIMES BETTER.
Wednesday, May 16, 2007
Xeon multicore performance are miserable !
Picture shows why: Intel bus based Xeon servers are bandwidth starving in 32 and 64 core configurations.
So, Intel needs Itanium for 32 and 64 core configurations. Until Nehalem arrive in 2009.
We all know that Microsoft Longhorn is currently troubled to pool off Intel's miserable ccNUMA performance.
The results also show that the poor local-memory bandwidth in commodity Intel-based systems, rather than the latency of remote-memory access, is often the main contributor to poor scalability and performance.
And local memory bandwidth depends on ... many things Xeon lacks. Integrated memory controller, hardware support for ccNUMA that extremely accelerates comuting , etc.
XEON is simply a synonym for bad multicore performance, that is why we still have ill fated Itanium as Intel's king of the performance hill.
It is quite natural that Intel is in panic after forthcoming Barcelona introduction. We could expect in a week or so NDA termination. Than the benchmarks will immediately show sorrow truth.
Xeon is a sucker.
Actually, the ccNYMA winning key is in the elusive solution that allows dynamic, adaptive performance optimizations. Intel will lack it in the next 3 years. Quite enough for you to drive out one Barcelona based server until then. If you are interested only in Intel shares, then think twice.
P.S. For those who wants to know more on Evaluating the Memory Performance of a ccNUMA System, please download enlightening PDF here. This picture below is on what Xeon is essentially lacking, but not quad core Barcelona (MCM glueing two dies or 45nm implementation will not help Intel without Nehalem new core in 2009):
We know that Cray favorize AMD over Intel's X86-64. This picture reveals why. Barcelona has Craylink compatible interface inside its die.
On the other side, AMD has its own problem with memory standards adoption. That will fix AMD's significant performance advancements to the moments when some new needed socket type is intoduced for the new DRAM interface applied. Say DDR3 in 2009. Until then Intel will heat and sweat running after competition.
So, Intel needs Itanium for 32 and 64 core configurations. Until Nehalem arrive in 2009.
Barcelona versus Xeon (Harpertown) connectivity
We all know that Microsoft Longhorn is currently troubled to pool off Intel's miserable ccNUMA performance.
The results also show that the poor local-memory bandwidth in commodity Intel-based systems, rather than the latency of remote-memory access, is often the main contributor to poor scalability and performance.
And local memory bandwidth depends on ... many things Xeon lacks. Integrated memory controller, hardware support for ccNUMA that extremely accelerates comuting , etc.
XEON is simply a synonym for bad multicore performance, that is why we still have ill fated Itanium as Intel's king of the performance hill.
It is quite natural that Intel is in panic after forthcoming Barcelona introduction. We could expect in a week or so NDA termination. Than the benchmarks will immediately show sorrow truth.
Xeon is a sucker.
Actually, the ccNYMA winning key is in the elusive solution that allows dynamic, adaptive performance optimizations. Intel will lack it in the next 3 years. Quite enough for you to drive out one Barcelona based server until then. If you are interested only in Intel shares, then think twice.
P.S. For those who wants to know more on Evaluating the Memory Performance of a ccNUMA System, please download enlightening PDF here. This picture below is on what Xeon is essentially lacking, but not quad core Barcelona (MCM glueing two dies or 45nm implementation will not help Intel without Nehalem new core in 2009):
We know that Cray favorize AMD over Intel's X86-64. This picture reveals why. Barcelona has Craylink compatible interface inside its die.
On the other side, AMD has its own problem with memory standards adoption. That will fix AMD's significant performance advancements to the moments when some new needed socket type is intoduced for the new DRAM interface applied. Say DDR3 in 2009. Until then Intel will heat and sweat running after competition.
Tuesday, May 15, 2007
No more P-rating, No more Athlon
While P-Rating has been abandoned, the new code reference will be a combination of two letters and four numbers. E.g. Athlon 64 BE-2300 and Sempron LE-1300. Phenom will share the similar reference.
AMD's shares go up and up.Just like its market share.
Sunday, May 13, 2007
Intel prepares yet another glossy paper emergency launch
Do you remember Prescott launch disaster?
Intel prepares yet another glossy paper emergency launch. Oh, yeah. Why?
Well, because it has nothing ready (close enough to this below ) for delivery in its well established 65nm :)
Intel prepares yet another glossy paper emergency launch. Oh, yeah. Why?
Well, because it has nothing ready (close enough to this below ) for delivery in its well established 65nm :)
Big Father Internet spying standard
This standard supports the ability of Internet access providers and Internet service providers to assist law enforcement agencies in intercepting Internet broadband data – and defines the communication-identifying information and content to be intercepted and reported, as well as the delivery format. Additionally, the standard provides for a “safe harbor” as specified in Section 107 of the Communications Assistance for Law Enforcement Act (CALEA). This newly released LAES standard applies to the intercept of data from individuals whose communications have been authorized to be delivered to a law-enforcement agency (LEA) by a legal instrument, such as a warrant. Once the LEA serves the Internet access or service provider (IASP), the IASP accesses the identified information, mediates as needed, and delivers the information to the LEA via equipment, facilities, or services the LEA has procured. Such information and data may include e-mail, instant messaging records, web-browsing information and other information sent or received through a user’s broadband connection, including on-line banking activity. While previous LAES standards from ATIS have addressed VoIP communication, the focus of this new standard is on network(s) that provide subscriber connectivity to the Internet. Internet access and services may be provided by a set of independent or related entities, i.e., a Digital Subscriber Line or Wireless Fidelity (Wi-Fi ®) provider and an Internet service provider.