BAD HARDWARE WEEK

With SS4A support. Before that, it passed A0-A2 revisions. B0 intentionally left some of its untamed bugs for B1 and subsequent B2 revision removal. B1 should tame the bugs and B2 revision tweak the parameters, at the first place clock, of course. One core revision requests some 4 months, thus on September 10th we will see announced B1 revision (that is currently, due to inherent instabilities locked to 2Ghz clock) .

When B2 for volumes? Probably only in 1Q 2008. AMD is obviously in panic delay 3 -6 months.
And marketing director is the only guilty? Interestingly to note, AMD added in its preliminary design L3 cache support only in December 2006. Obviously, competitive pressure from Intel has helped a bit. Then the final, thoroughly tested product is not reasonable to expect earlier than in December 2007. That is why there is no official K10 benchmarks yet. Phenom X4 should later run at 2.6-2.8GHz clock and at 125W TDP, until 45nm implementation arrives. Well, 30W per 2,8 Ghz core is not so bad.