Wednesday, March 09, 2011
3D DRAM integration technology in 2013 !
The group hopes to accelerate the development of the technology. The "introduction vehicle" for the effort is a wide I/O DRAM for cell phones, he said. Device production is targeted for 2013.
Experts define a true 3-D package as one that stacks various chips vertically and then connects them by deploying TSVs. The aim is to shorten the interconnections between the chips, reduce die sizes and boost device bandwidths.
One of the big and recent announcements in the arena came from Xilinx Inc., which recently discussed a "stacked silicon interconnect" FPGA.
However, there are several problems with TSV technology: Lack of EDA design tools; complexity of designs; integration of assembly and test; cost; and lack of standards.
Experts define a true 3-D package as one that stacks various chips vertically and then connects them by deploying TSVs. The aim is to shorten the interconnections between the chips, reduce die sizes and boost device bandwidths.
One of the big and recent announcements in the arena came from Xilinx Inc., which recently discussed a "stacked silicon interconnect" FPGA.
However, there are several problems with TSV technology: Lack of EDA design tools; complexity of designs; integration of assembly and test; cost; and lack of standards.
THIS LINK posted by Joseph Bell : 9:55 AM
