Monday, March 21, 2011
Double floating gate FET: potential unified memory device
It is intended to replace a DRAM with a combined memory. The array may switch to a hibernate mode in ~30 ms, assuming 1024 rows in each memory bank.
A switch from a hibernate mode to the active mode takes ~14 ms.
A switch from a hibernate mode to the active mode takes ~14 ms.
THIS LINK posted by Joseph Bell : 4:29 PM
