BAD HARDWARE WEEK

The A7 is a dual-issue, eight-stage pipeline core that has been heavily optimized for power efficiency, but supports the same virtualization and extended addressing of the A15. As a result ARM (Cambridge, England) expects partners to implement a "little dog, big dog" strategy so that cores are selected to run different applications based on power efficiency needs. 

BAD HARDWARE WEEK: We were the first with announcement. A few days ago.
Ipod 5 has been mainly waiting for this announcement. Here is a  promotion video.

Cortex-A7 MPCore >1GHz in 28nm :
Architecture	ARMv7-A  Cortex
Multicore	1-4X SMP within a single processor cluster Multiple coherent SMP processor clusters through AMBA® 4 technology
ISA Support	ARM Thumb-2 TrustZone® security technology NEON™ Advanced SIMD DSP & SIMD extensions VFPv4 Floating point Jazelle® RCT Hardware virtualization support Large Physical Address Extensions (LPAE)
Memory Management	ARMv7 Memory Management Unit
Debug and Trace	CoreSight™ DK-A7