BAD HARDWARE WEEK

“With these [MorphCore] and other promising ideas developed in collaboration with Intel’s academic partners, processors in the next 5-10 years may offer the best of both worlds: high performance to minimize delay and deliver the best user experience; as well as throughput mode to maximize efficiency when single thread performance is less important,”
Chris Wilkerson Intel Labs, Hillsboro, OR
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99% BAD HARDWARE WEEK: Short for Thread-Level Parallelism, TLP is a software capability that enables a program, often a high-end program such as a database or web application to work with multiple threads at the same time instead of having to wait on other threads. Programs that support this ability can do a lot more even under high levels of work loads.
OOO reservations to be used as in-order instruction buffers  .
A many-to-one threading model maps many user processes directly to one kernel thread, the kernel thread can be thought of as the main process. This is good for single ILP processor.
A one-to-one threading model maps each user thread directly to one kernel thread, this model allows parallel processing on the multiprocessor systems. Each kernel thread can be thought of as a VP (Virtual Process) which is managed by the scheduler.  Exploits TLP.