Thursday, March 09, 2006
Intel CEO rides again
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1. Quite contrary to name change, Netburst still hapilly lives INSIDE (TM). At least in its bigger part. Thus lie No 1.
2. Core architecture consumes low power and simultaneously shows 30% better performance than AMD64?.
Lie number 2. Though it might be correct in lowest part of Core architecture called Merom (after Jewish sanctuary in Golan, Israel), but it is simply a lie for high end of Core architecture line.
But, how do I know? At glance above, Intel's new balls Conroe and Woodcrest seem pretty mighty!
Well, actually we can't know until Core architecture emerges in the nearest store, but here is the hint:
http://www.xbitlabs.com/news/cpu/display/20060202133551.html
Conroe Mainboards to Acquire New VRM 11
As you know, VRM (Voltage Regulator module) is on board DC/DC converter that converts PSU input
voltage range of 11,2 to 12,6V into processor needed voltage, for Intel's 65nm processor line in the range
0,8175 to 1,6V and needed currents up to 150A (180A) peak. Can processor draw more power than VRM supplies? No, of course not, after the Law of Energy conservation, whose direct conequnce is inability of the perpetuum mobile machines. Now comes the most important part:
Latest IDF report confirms that Conroe (and thus Woodcrest) really ask VRM 11 for theirs performance.
Xbit explanation is that the reason is generally for some improved processor power supply specification.
"It looks like the mainboard voltage regulator should be adapted for stable work with Conroe processors that can support lower voltages and have smaller voltage adjustment increments."
But, that is simply not correct. I have the latest VRM 11 revision 1.1 specs and there is no significant
improvements in those voltages. Yes VRM 11 lowest voltage is somewhat lower than VRM 10.2 specification from March 2005 allows , but that is so small improvement that it doesn't deserve VRM and mobo change. The only thing I noticed that might be important, is however not related with Xbit info above. New VRM 11 gives improvement in the slew rate, enabling 1100 amperes of change per microsecond. Max VRM current is 150A , and from zero current it might be reached in 8 microseconds, what is significantly better result than at old VRM 10.2
Let me conclude, new Core architecture power sparing techniques should keep processor the main part of time SWITCHED OFF, because of extremely high leakage that Intel new 65nm manufacturing process shows. That way, Intel's the worst 65nm problem should be solved. The real world problems emerge when application ask from processor to swing to full performance (and consequently power consumption) in a very short time (ie. OS context switches are typically longer than 10 microseconds). But, it was shown above that it would require more than 10 microseconds with the old VRM 10.2 specification, and thus new one VRM specification 11 was needed.
Yes, we all rember Intel's happier years ( pre AMD64 ones), when CEO Barrett has been riding something else:
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